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PFC500/PDC500 Series Data Sheet
PDC500 Input Specifications
PARAMETER
Input Voltage - DC
CONDITIONS/DESCRIPTION
Continuous input range. Full power at 42-75 VDC.
MIN
36
NOM
MAX
75
UNITS
VDC
Derate linearly from 40 VDC to 36 VDC, 400W.
Low Voltage Protection
Hold-up Time
Input Current
Input Protection
Inrush Surge Current
Lowest DC input voltage.
At full load over DC input range.
48 VDC at full rated load.
Non-user serviceable internally located fuse.
Vin = 75 VDC, cold thermistor.
34
17
14
TBD
VDC
ms
ADC
A PK
Output Specifications (PFC500 and PDC500)
PARAMETER
Efficiency
CONDITIONS/DESCRIPTION
Full rated load, 110 VAC (PFC500)/ 48VDC (PDC500).
MIN
75
NOM
MAX
UNITS
%
Minimum loads
PFC/PDC500-1024
0.6
PFC500-1028
PFC500-1048
0.6
1.2
Amps
Ripple and Noise
Full load, 20 MHz bandwidth.
See Model Selection Charts
Output Power
300 LFM forced air cooling required for operation. See optional fan.
Continuous power, multiple output models. PDC500 requires derating below
500
Watts
42 VDC; see PDC500 input specifications.
Overshoot / Undershoot
Regulation
Transient Response
Turn-on Delay
Turn-on Rise Time
Output voltage overshoot/undershoot at turn-on.
Without connection of remote sense. PFC/PDC500-1024
PFC500-1028
PFC500-1048
Recovery time, to within 1% of initial set point due to a 50-100% load change,
3% max. deviation.
Time required for initial output voltage stabilization.
Time required for output voltage to rise from 10% to 90%.
1
10
0
0.8
0.7
1.0
1
V
%
ms
Sec
ms
Interface Signals and Internal Protection (PFC500 and PDC500)
PARAMETER
CONDITIONS/DESCRIPTION
MIN
NOM
MAX
UNITS
Overvoltage Protection
PFC/PDC500-1024 27.0 30.7
PFC500-1028 32.0 35.0
PFC500-1048 60.0 70.0
V
Overload Protection
Overtemperature Protection
Fully protected against output overload and short circuit. Automatic recovery upon removal of overload condition.
System shutdown due to excessive internal temperature, automatic reset.
Remote Sense
Current Share
Inhibit
Total voltage compensation for cable losses with respect to the main output. 250
Accuracy of shared current with up to 6 parallel units. 10
TTL compatible logic signal will inhibit outputs by the application of a logic low signal.
An open circuit or external TTL high signal allows normal operation.
mV
%
Input Power
Fail Warning
TTL compatible logic signal. Time before regulation dropout due to
loss of input power at 110 VAC.
4
ms
Power Good
TTL compatible signal. Signal is low if main output is greater PFC/PDC500-1024 22.08 27.36
or less than 10% of nominal. For models without the PFC500-1028 25.20 30.80
V
“D” option, internal pull-up resistor is 1k
For “D” option, PFC500-1048 44.20 54.72
pull-up resistor is 475 . See Apps Note #P1 for details.
Fan Voltage
Provides 170mA current to user supplied fan if fan option is not selected. 12
V
AUG 01, 2003 revised to JUL 13, 2006
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